A Micropower Learning Vector Quantizer for Parallel Analog-to-digital Data Compression

An analog VLSI architecture for learning vector quantization (LVQ), with on-chip adaptation and dynamic storage of the analog templates, is presented. The architecture extends to Fuzzy ART and Kohonen self-organizing maps through digital programming. The analog memory and adaptive element of the LVQ cell comprise 6 MOS transistors and one capacitor, and provide for robust selfrefresh of the dynamic analog storage. Total cell size including distance and adaptive computations is 80 70 lambda in scalable MOSIS technology. Experimental results from a fabricated 16 16 cell prototype in 2 m CMOS are included.